A tool for compiling and running HIP/CUDA on SPIR-V via OpenCL or Level Zero APIs

Area: Programming models and runtimes

CASS member: S4PST

Description

chipStar enables compiling and running HIP and CUDA applications on platforms which support SPIR-V as the device intermediate representation. It supports OpenCL and Level Zero as the low-level runtime alternatives.

Target audience

chipStar is intended to be used by application and runtime developers that already target HIP or CUDA and want to target a platform that supports OpenCL or Level-Zero, such as Intel GPUs.

Additional resources